Memory chips just 10 atoms thick could vastly increase capacity

Today's silicon chips are extremely dense, but ultra-thin 2D materials could make them even more compact.

U Kailan/Alami

Working memory chips as thin as 10 atoms could lead to significantly higher capacity in electronic devices such as smartphones.

After decades of miniaturization, modern computer chips now have vanishingly small components that often clutter them up. tens of billions of transistors to an area the size of a fingernail. But while the size of components on a silicon wafer has become extremely small, the wafers themselves remain relatively thick, meaning there are limits to how much you can increase the complexity of chips by stacking multiple layers on top of each other.

Scientists have been working on thinner chips made from so-called 2D materials for example, graphene, which is made of a single layer of carbon atoms and is theoretically as thin as possible. But until now, only simple chip designs could be made from such materials, and it was difficult to connect them to traditional processors and integrate them into electrical devices.

Now Chunsen Liu from Fudan University in Shanghai and his colleagues combined a 2D chip about 10 atoms thick with a chip called CMOS, which is currently used in computers. The way these chips are made leaves a rough surface, making it difficult to lay a 2D sheet on it. Liu and his colleagues overcame this problem by separating the 2D chip from the traditional CMOS chip with a layer of glass, which is not part of current processes and must be industrialized before mass production.

The team's prototype working memory module was more than 93 percent accurate in tests. While this falls far short of the reliability required for consumer devices, it represents a promising proof of concept.

“This is a very interesting technology with huge potential, but there is still a long way to go before it becomes commercially viable,” says Steve Ferber at the University of Manchester, UK.

Kai Xu King's College London says further shrinking existing chip designs without using 2D materials will be problematic because signal leakage occurs when traditional components are manufactured to extremely small widths. Reducing the thickness of the layers can overcome this effect – meaning that miniaturization in thickness could potentially allow even greater miniaturization in width.

“Silicon has already faced obstacles,” says Xu. “The 2D material may be able to overcome these effects. If it is very thin, the gate control can be more uniform and more refined, so there will be less leakage.”

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